With the rapid development of the Ethernet, how to realize clock synchronization (including time synchronization and frequency synchronization) between Ethernets is an important issue. Take wireless applications as an example, presently, the accuracy of the clock is strict to mobile base stations, not only the clocks are required to be synchronous in the network, but also precise synchronization of the clocks is required. In order to achieve this objective, the mobile base stations adopt GPS for clock synchronization, but the cost of this method is very high.
In order to solve the problem of high cost of clock synchronization between the mobile base stations and the problem of precise synchronization between conventional asynchronous Ethernets, precision time protocol (PTP) of IEEE 1588 protocol is developed. The PTP protocol realizes the clock synchronization of Ethernet by transmitting a precise time stamp through a 1588 packet of the Ethernet. For example, as for the time stamp relation between a master device and a slave device, according to the time stamps between the two devices, time offset between the two devices can be calculated, thus realizing frequency modulation and time modulation of the slave device, such that the slave device can track the master device, and obtain precise frequency and time. The calculation formula of the offset is as follows:Offset=[(t2−t1−t1_correction)+(t3−t4+t3_correction)]/2  (1)
In the above formula, t1 is a time stamp that the sync message leaves the master device, and the sync message carries the time stamp t1 from the master device to the slave device; t1_correction is a sum of the resident time of the sync message in all transparent clock (TC) devices; t2 is a time stamp that the slave device receives the sync message; t3 is a time stamp that the delay_req message leaves the slave device; t3_correction is a sum of the resident time of the delay_req message in all the TC devices, and the delay_rep message carries the correction field t3_correction from the master device to the slave device; and t4 is a time stamp that the master device receives the delay_req message, and the delay_resp message carries the time stamp t4 (together with the t3_correction) from the master device to the slave device.
It can be seen from Formula (1) that, in order to make the system to be precisely synchronous, when a TC device transfers the 1588 packet, the TC device needs to calculate the precise resident time of the 1588 packet in itself. The value of the correction of the calculation formulation of the offset is a sum of the resident time in all the TC devices.
As shown in FIG. 1, a schematic structural view of a single TC device is shown. A main control unit of the device sends a synchronization command every a fixed time (generally, 1 s) to synchronize all interface boards, e.g. interface board 1, interface board 2, . . . , and interface board N, such that the times of the interface boards of the whole TC device are unified, so as to realize the purpose of precisely calculating the resident time and the time stamp. According to the specification of the protocol, the formats of the time information and the correction field information are shown in Table 1 and 2 respectively.
TABLE 1Format of time informationsecond value informationnanosecond value information(48 bits)(32 bits)
TABLE 2Format of correction field informationsign bitnanosecond valuedecimal information of the(1 bit)information (47 bits)nanosecond value (16 bits)
When the 1588 packet enters the TC device through an uplink input port, an uplink time stamp is read, and the uplink time stamp is subtracted from the value of the correction field carried in the 1588 packet, and the result obtained by the subtraction is used to update the correction field carried in the 1588 packet; after being processed by the TC device, when the 1588 packet leaves the TC device through a downlink output port, a downlink time stamp is read, and the value of the correction field carried in the 1588 packet is added to the downlink time stamp, and a result obtained by the addition is used to update the correction field carried in the 1588 packet, thus completing the processing process of the correction field in the 1588 packet.
The solution in the prior art has the following problems. As the formats of the time information and the correction field information are not unified (as shown in Tables 1 and 2), as for an interface board, two sets of mechanisms are needed to complete the processing of the time information of the 1588 packet and the process of the correction field information respectively. FIG. 2 is a schematic structural view of an interface board in the prior art. As shown in FIG. 2, the synchronous information is transferred to an OC/BC processing unit after being processed by a time stamp processing unit, and then transferred to a TC processing unit after being processed by a correction field processing unit, such that the complexity of the process is increased, and much resource is occupied.